MSEE · ASIC / PHY Engineer · Aircraft Navigator · Artist · Science Communicator
If you are a team that wants to build something on FPGA or ASIC — a new PHY, a near-memory compute engine, an HBM-attached graph accelerator, a wireless modem, an AR/VR display interface — and you need an engineer who has built all of those things at production-silicon level, that is what TCA is for. Contract design, IP development, technical consulting, and long-term collaboration are all on the table. TCA operates globally; geography is not a constraint.
Background spans: BLE / ANT+ / (G)FSK RX PHY (Freescale), polar FEC codec on TSMC 16nm/7nm (Xilinx), HoloLens v2 display–sensor die (Microsoft), HF ground wave modem on Virtex 5/6 (ARL), computational imaging IP (InView), HBM4 timing model and open-source BFS-HBM RTL (TCA).
For questions about the HBM bandwidth efficiency model, the BFS-HBM RTL, or the Art of Art manuscript — email is the fastest path. All three paper repositories are open source on GitHub.
For arXiv cs.AR endorsement inquiries: available on request for researchers in computer architecture and memory systems.
Boss of Nerd Nite Fort Collins since its relaunch in 2023. Science communication talks on hardware engineering, AI systems, cybernetics, and the art–technology interface. Available for guest talks, panels, and university outreach worldwide.